Mauro Prevostini

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Master Thesis Supervised

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High Level Design through UML profiles (October 2008-September 2010)
Goal of this project is to analyse the gap between UML profiles and HW/SW Codesign. In particular the gaps between SysML/MARTE and Design Space Exploration, SysML/MARTE and Model Verification, and between SysML/MARTE and SystemC code generation should be analysed. Possible solutions in order to fill these gaps should be proposed and a demo that solves these kinds of problems should be implemented.
(in collaboration with Ioannis Argyris, MSc student at ALaRI; Marcello Mura, PhD student at ALaRI)

Measuring Vineyard Condition using Wireless Sensor Network and Prediction Algorithms (October 2008 - July 2009)
The goal of the project is to specify the requirements of a management system aiming at preventing vineyard pests (arthropods, diseases) from reaching economically relevant densities by means of a Wireless Sensor Network and a set of algorithms able to represent actual and predict changes in pest occurrences .
The student should be able at the end of the project to provide some indications on a) a small demonstrator which consists of a small wireless sensor network and the software that should implement the prediction algorithms and manage the collected data, b)  how to integrate the needed technology into the existing pest management system.
(in collaboration with Ivana Pavlovic, MAS student at ALaRI; Mauro Jermini, Agroscope, Johann Baumgartner and Ivo Rigamonti, Uni Milan)

Bridging the Gap Between SysML and HW/SW Codesign (October 2007 - July 2009)
Goal of this project is to analyse the gap between SysML and HW/SW Codesign. In particular the gaps between SysML and Design Space Exploration, SysML and Model Verification, and between SysML and SystemC code generation should be analysed. Possible solutions in order to fill these gaps should be proposed and a demo that solves these kinds of problems should be implemented. The project will be developed using a simple case study.
(in collaboration with Luis Gabriel Murillo, MSc student at ALaRI; Marcello Mura, PhD student at ALaRI)

Optimizing WSN Configurations depending on Power Consumption to measure Vineyard Microclimate Conditions (October 2007 - July 2008)
The goal of the project is to analyse the specifications of a system, based on a wireless sensor network, able to measure the useful parameters to monitor the microclimate conditions of a vineyard. In particular the student should propose some indications on how to integrate the needed technology and eventually develop a small demonstrator which consists of a small wireless sensor network and the software that should manage the collected data.
(in collaboration with Zoran Filipovic and Gabriele Memmi, MAS students at ALaRI)

UML/SysML Description of a Wireless Sensor Network to Measure the Vineyard Microclimate Conditions (October 2006 - July 2007)
The goal of the project is to collect the requirement specifications of a system, based on a wireless sensor network, able to measure the useful parameters to monitor the microclimate conditions of a vineyard. In particular the student should produce the state of the art of similar applications, describe the system by means of UML/SysML diagrams, and develop a small demonstrator which consists of a small wireless sensor network and the software that should manage the collected data. Within this context a SysML profile should be proposed with the aim to describe heterogeneous devices that are useful for wireless sensor networks. In particular the student should analyse the state of the art of any kind of sensors or devices consisting of sensor, CPU and RF transceiver and be able to describe them within a SysML model. The model should be ready to be used in a system partitioning context.
(in collaboration with Ana Jankovic, MAS student at ALaRI; Gerardo Ismael Garcia Lecuona, MSc student at ALaRI)

Bridging the Gap Between SysML, HW/SW Codesign and Model Verification (October 2006 - July 2007)
Goal of this project is to analyse the gap between SysML and HW/SW Codesign. In particular the gaps between SysML and Design Space Exploration, and between SysML and SystemC should be analysed. Possible solutions in order to fill these gaps should be proposed and a demo that solves these kinds of problems should be implemented. Finally the students should investigate how to verify the models by means of Model Checking techniques. The project will be developed using a simple case study.
(in collaboration with Elena Zamsha, MAS student at ALaRI)
technical report

UML Profiles and Modeling Tool for Wireless Sensor Networks (October 2005 - July 2007)
Recently the sensor network research enabled a lot of advanced solutions in order to measure different parameters in several application fields. One of them is the wine production field, in particular measuring the microclimate conditions of the vineyard. Other possibilities are the development of Remote Meter Reader systems, or of home automation and automotive. The first phase in order to enable the use of this new technology is a proper modeling. For this scope UML is an important instrument to use, as it is recognized both at the academic and industrial level as the main modelling tool for HW/SW applications during the system-level design phase because it is platform independent. In this project the student will create UML profiles in order to build various kinds of networks. These profiles will then be inserted through XMI in a tool that will enable the modeling of simple networks in a very short time. The previously stated applications should be investigated in order to provide a first validation of the tool.
(in collaboration with Amanda Mattiuz, MSc student at ALaRI; Marcello Mura, PhD student at ALaRI)
technical report

Methodology to Verify UML Specifications using LTL Model Checking (October 2005 - September 2006)
The goal of the project is to develop a methodology in order to verify UML specification using temporal logic model checking. The student should identify the steps to transform UML models into a language used to specify finite-state transition systems (e.g. Promela), which is used in model checking tools (e.g. SPIN or SATABS) to verify the model under predefined system properties. The system properties should be described using Linear Temporal Logic (LTL). To transform the UML models into a verification language the student should take into consideration XMI and XSLT. The student should learn UML, LTL, XMI and XSL Transformation.
(in collaboration with Tihomir Barakov, MSc student at ALaRI; Francesco Regazzoni, PhD student at ALaRI)

Bridging the Gap between SysML and Design Space Exploration (October 2005 - July 2006)
In the last few years wireless communication has enabled the user mobility in such a way that more and more embedded systems are required to satisfy new applications in different kind of fields like automotive systems, ambient intelligence (e.g. smart home, pervasive and ubiquitous computing). These new applications usually require high reliability, security, low-power design, etc. Also, time to market is an important factor that companies have to deal with. All these aspects require new design methodologies and new specification languages to support system engineers in developing heterogeneous systems where hardware and software are combined. One of the emerging modeling languages for system designers is the UML-based language called Systems Modeling Language (SysML). The most important task to address early in the system design phase is the design space exploration (DSE). DSE helps in addressing time to market and provides a way to design the system which meets the business requirements. In the context of this report, a methodology on how to use SysML for a design space exploration analysis within a system design phase is described. The methodology is supported by a case study as well. An automatic way of performing the DSE is also described in this thesis. KEYWORDS: System-Level Design Unified Modeling Language, Design Space Exploration, SysML.
(in collaboration with Ganesan Sivakumar, MAS student at ALaRI)
publication at FDL'06

System-Level Design of the Security Concept of a Remote Meter Reader (October 2004 - July 2005)
Starting from a UML System-Level Design of a Remote Meter Reading (RMR) System, the designer should develop a security concept/model/protocol taking care of authentication, confidentiality, data integrity, theft monitoring and low-power constraints. A possible implementation could be based e.g. on lwIP (light weight protocol). The security concept/model/protocol will be described using UML and one of the goals of the present project will be checking on efficiency of use of UML against “traditional” approaches. This project is based on Alari Master’s Thesis of the last few years.
(in collaboration with Daniel Spanagel, MAS student at ALaRI)
technical report

System-Level Design of the Security Concept of a Wireless Meter Reader (October 2003 - July 2004)
Starting from a UML System-Level Design of a Wireless Meter Reading (WMR) System, the designer should develop a security concept/model/protocol (e.g. based on IPSec) taking care of low-power constraints. A possible implementation could be based e.g. on lwIP (light weight protocol). The security concept/model/protocol will be described using UML and one of the goals of the present project will be checking on efficiency of use of UML against “traditional” approaches.
(in collaboration with Giuseppe Piscopo, MAS student at ALaRI; Ivan Stefanini)
publication at FDL'04

System-Level Design using UML and a HW/SW Codesign Environment (October 2003 - July 2004)
The project involves the development and test of a methodology for the design of embedded systems starting from UML specifications. The designer has the possibility to provide the functional and structural specification of a system as a set of communicating modules (classes) in the UML specification. HW/SW partitioning information provided by the user on a module-by-module basis are then used in order to export the system specification to a specific Codesign environment able to synthesize hardware, software and the interfaces between hardware and software. Cost and performance estimates provided by the codesign tool should be back-annotated into the original UML specification in order to drive hardware/software partitioning iterations until the optimal architecture has been identified.
(in collaboration with Ananda Shankar Basu, MAS student at ALaRI; Marcello Lajolo, Research Staff Member at NEC Laboratories America, Princeton, NJ, USA)
publication at UML-SOC'04
publication at FDL'04
publication at UML-SOC'05
chapter in UML for SOC Design

HW/SW Partitioning of an Embedded System Starting from UML System Specifications (October 2002 - July 2003)
Using UML, describe the System-level specifications of an embedded system. Starting from this UML system description, the designer should develop an algorithm able to define the HW and SW partitioning of the embedded system. In other words the algorithm should be able to identify which system components must be developed in HW and which ones in SW. The development project of the embedded system must be evaluated by the designer in terms of cost, performance, size and consumption. The case study chosen is a wireless meter reader. One of the goals of the present project will be checking on efficiency of use of UML against "traditional" approaches.
(in collaboration with Francesco Balzarini and Atanas Nikolov Kostadinov, MAS students at ALaRI)
publication at VECIMS 2003
publication at FDL'03
chapter in Languages for System Specification

Low-power, Low-cost Utility Meter Remotely Connected by Wireless Link (October 2001 - July 2002)
The problem can be formulated in very general terms as that of designing a system capable of providing metering functions for different utilities (i.e., adaptable to different sensors), of performing simple processing functions and of transmitting (possibly receiving) information over wireless links the last point involving of course protocol handling, data formatting etc. The system should be characterized by very low cost (thus, standard core DSPs should be envisioned for both transmission and processing functions), very low power consumption (the meter should be battery-powered, battery life being required to last over ten years), provide a measure of security (both with respect to the end user's sensitive data and to the utility's access provisions), flexibility and adaptability to different requirements, standards etc. The problem is attacked at system level, starting from formal and verifiable specifications and going to identification of a small real-time kernel, extraction of the "core" segment of a transmission protocol, analysis of compatibility requirements for data formatting.
(in collaboration with Srinivas Mankan, Aris Martinola and Antonio Minosi, MAS students at ALaRI)
publication at MSy'02

Last Updated on Friday, 05 November 2010 15:02